Performance Analysis of PTP Components for IEC 61850 Process Bus Applications

Title

Performance Analysis of PTP Components for IEC 61850 Process Bus Applications

Subject

Testing

Ethernet networks

IEC standards

IEEE 1588

performance evaluation

protective relaying

Synchronization

Clocks

smart grids

Substations

time measurement

Delay

International Electrotechnical Commission (IEC) 61850

Performance evaluation

power transmission

Precision Time Protocol (PTP)

Creator

David M. E. Ingram

Pascal Schaub

Duncan A. Campbell

Richard R. Taylor

Source

IEEE Transactions on Instrumentation and Measurement. Vol. 62, No. 4, pp. 710-719

Publisher

IEEE

Date

2013-04

Relation

ISSN 1557-9662

Format

application/pdf

Language

en

Type

Peer-reviewed Article

info:eu-repo/semantics/article

info:eu-repo/semantics/acceptedVersion

Identifier

10.1109/TIM.2013.2245188

Abstract

New substation automation applications, such as sampled value (SV) process buses and synchrophasors, require a sampling accuracy of 1 μs or better. The Precision Time Protocol (PTP), IEEE Std. 1588, achieves this level of performance and integrates well into Ethernet-based substation networks. This paper takes a systematic approach to the performance evaluation of commercially available PTP devices (grandmaster, slave, transparent, and boundary clocks) from a variety of manufacturers. The “error budget” is set by the performance requirements of each application. The “expenditure” of this error budget by each component is valuable information for a system designer. The component information is used to design a synchronization system that meets the overall functional requirements. The quantitative performance data presented show that this testing is effective and informative. Results from testing PTP performance in the presence of SV process bus traffic demonstrate the benefit of a “bottom-up” component testing approach combined with “top-down” system verification tests. A test method that uses a precision Ethernet capture card, rather than dedicated PTP test sets, to determine the correction field error of transparent clocks is presented. This test is particularly relevant for highly loaded Ethernet networks with stringent timing requirements. The methods presented can be used for development purposes by manufacturers or by system integrators for acceptance testing. An SV process bus was used as the test application for the systematic approach described in this paper. The test approach was applied, components were selected, and the system performance was verified to meet the application's requirements. Systematic testing, as presented in this paper, is applicable to a range of industries that use, rather than develop, PTP for time transfer.